A hands-on, experienced Physical Design Engineer to join us and help define and implement Company’s next-generation AI SoC in an advanced technology node
Play a key role in building and leading our physical design team, developing flows and methodologies, and driving the full RTL-to-GDSII implementation and signoff for one of the most advanced SoCs in the industry.
· Take part in shaping methodology and best practices in advanced technologies
· Drive end-to-end implementation: synthesis, P&R, timing closure, and signoff
· Collaborate closely with architecture and design teams on timing, floorplaning, partitioning, and power specification
· Define and optimize Static timing constraints area, and power goals at block and top levels
· Take part in flow development and automation to improve efficiency and quality of results